Maia P. Blanco

I am a PhD Candidate at the Carnegie Mellon University Department of ECE.

My PhD work focuses on high-performance algorithms, architectures, and techniques for graph processing and development of analytical performance models for scientific (HPC) workloads.

I am interested in research or work in industry where I will have an impact on computer architectures, performance, and workloads that drive science and society.

Research Interests

Graph processing, performance modeling, High Performance Computing (HPC), computer architecture, scientific computing

Education

Expected Graduation: December 2022 PhD Candidate

Carnegie Mellon University, Pittsburgh, PA

Advisor: Dr. Tze Meng Low, Electrical and Computer Engineering Department
Pursing PhD in High Performance Computation and Modeling for Graph Algorithms
Recipient of NSF Graduate Fellowship Award, on tenure since Fall 2019
Active member of Eta Kappa Nu Honor Society
Active officer in ECE Graduate Organization

Graduated: May 2019 Master of Science

Carnegie Mellon University, Pittsburgh, PA

MS in Electrical and Computer Engineering
Conferred in completion of research and coursework requirements while pursing PhD

Graduated: May 2017 Bachelor of Science

Rensselaer Polytechnic Institute, Troy, NY

Dual Major in Computer Systems Engineering and Computer Science
Member of Upsilon Pi Epsilon and Eta Kappa Nu Honor Societies

Publications

[Outstanding Student Paper] M. P. Blanco, S. McMillan, T. M. Low, “Delayed Asynchronous Iterative Graph Algorithms,” presented at the 2021 IEEE High Performance Extreme Computing Conference (HPEC), held virtually.

Azad et al. “Evaluation of Graph Analytics Frameworks Using the GAP Benchmark Suite,” 2020 IEEE International Symposium on Workload Characterization

M. P. Blanco, S. McMillan, T. M. Low, “Towards an Objective Metric for the Performance of Exact Triangle Count,” presented at the 2020 IEEE High Performance Extreme Computing Conference (HPEC), held virtually.

[Graph Challenge Champion] M. Blanco, T. M. Low, and K. Kim, “Exploration of Fine-Grained Parallelism for Load Balancing Eager K-truss on GPU and CPU,” presented at the 2019 IEEE High Performance Extreme Computing Conference (HPEC), Waltham, MA, USA, p. 7.

U. Sridhar, M. Blanco, R. Mayuranath, D. G. Spampinato, T. M. Low, and S. McMillan, “Delta-Stepping SSSP: From Vertices and Edges to GraphBLAS Implementations,” in 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2019, pp. 241–250.

Carothers et al. 2017. “Durango: Scalable Synthetic Workload Generation for Extreme-Scale Application Performance Modeling and Simulation,” In Proceedings of the 2017 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation (SIGSIM-PADS 2017).

Mandal et al. 2016. “Toward an end-to-end framework for modeling, monitoring and anomaly detection for scientific workflows.” Parallel and Distributed Processing Symposium Workshops, 2016 IEEE International.

Awards

Fall 2019 to Present NSF Graduate Fellowship for Computer Engineering (On tenure)

September 2021 Outstanding Student Paper award at IEEE High Performance Computing 2021

September 2019 Graph Challenge Champion at High Performance Extreme Computing

Work Experience

Summer 2021 Graduate Research Intern

CMU Software Engineering Institute, AI Division, Pittsburgh PA

Collaborated with researchers at the AI Division of the SEI to design high-performance subroutines for graph traversal primitives in the GraphBLAS Template Library (GBTL).
GraphBLAS defines an API that enables users and developers to separate concerns of developing algorithms from writing efficient and performant code.

Summer 2019 Graduate Research Intern

Sandia National Laboratories, Albuquerque NM

Collaborated with researchers at Sandia National Labs to model and optimize a molecular dynamics approach called SNAP.
Analyzed existing code base performance on CPU architectures from ARM, IBM, and Intel.
Rewrote existing approach to take advantage of SIMD hardware on all three CPU architectures and worked to develop an analytical performance model for the new approach.
Attained 1.66x to 3.22x end-to-end application speedups using new approach and auto-vectorization in GCC.

Spring and Fall 2018 Graduate Teaching Assistant

Carnegie Mellon University, Pittsburgh PA

Mentored students in lectures and in office hours on design of efficient, high performance code
Taught benchmarking techniques utilizing x86 ASM, compiler optimizations, use of SIMD,principles of memory hierarchy, and parallelism via OpenMP and MPI

Summer 2016 & 2017 Software Development Engineering Intern

Microsoft Corporation, Redmond WA

'17

Applied data science techniques to improve Office Admin Portal based on customer feedback '16
Iterated on discussions with team members to develop and refine customer feedback analysis

Summer & Fall 2015 Undergraduate Computer Science Researcher

Rensselaer Polytechnic Institute Troy, NY

Created MPI-based hybrid simulator for parallel workload modeling on supercomputers
Learned principles of efficient distributed code for use on HPC systems
Work incorporated into publication of Durango in SIGSIM-PADS’17
Learned use of SLURM on RPI’s Blue Gene Q Supercomputer

Spring 2014 - Fall 2014 Advising and Learning Assistance Center Tutor

Rensselaer Polytechnic Institute Troy, NY

Tutored peers in computer science (Python and C++) in group and one-on-one settings

Course Projects

Fall 2018 Social Circle Analysis Project in Machine Learning (10-701)

Applied autoencoders & unsupervised clustering on social network structure and content

Spring 2018 RL DVFS Governors Work done in System Level Design group

Prepared DVFS framework for students in 18-651
Presented poster on thermal-aware Reinforcement Learning at MLSE’18

Spring 2018 Matrix Inversion Accelerator Project in Computer Architecture (18-742)

Explored design space of cache and scratchpad accelerators using Gem5-Aladdin framework

Spring 2018 Parallel and Distributed SGD Project in Optimization (18-660)

Implemented and tested scalability of parallel and distributed SGD algorithms

Fall 2017 Multi-kernel CNN Accelerator Project in Reconfigurable Logic (18-643)

Designed and demonstrated layer-optimized CNN kernels on Zynq FPGA

Spring 2017 Parallel Finite Element Analysis Project in Parallel Programming for Engineers

Implemented 3D method of stiffness for truss deformation in OpenMP & CuBLAS

C/C++, OpenMP, limited MPI, CUDA, and C#
SLURM and PBS job scheduling on HPC systems
Python, Git, MATLAB, Bash, limited JavaScript
Experience in technical writing and presentation
Vivado HLS, embedded programming, PCB design
Linux kernel programming
Conversant in French and Spanish, elementary Mandarin Chinese